The present invention disclosed herein relates generally to semiconductor memory devices, and more particularly, to nonvolatile memory devices and programming methods thereof.
Semiconductor memory devices are generally categorized into volatile memory devices (e.g., DRAMs and SRAMs) and nonvolatile memory devices (e.g., EEPROMs, FRAMs, PRAMs, MRAMs, and flash memories). A volatile memory device loses stored data when the power supply is interrupted; whereas a nonvolatile memory device retains stored data even when the power supply is interrupted. In particular, a flash memory is widely used as a storage medium in a computer system because of its high program speed, low power consumption and large storage capacity.
A flash memory may store 1-bit data or 2-bit or more data in one memory cell. In general, a memory cell storing 1-bit data is called a single level cell (SLC), and a memory cell storing 2-bit or more data is called a multi level cell (MLC). The SLC has an erase state and a program state according to a threshold voltage, and the MLC has an erase state and a plurality of program states according to a threshold voltage.
During a program-verify operation, bit lines that have been programmed are typically driven to an inhibit voltage level, which may be at the power supply voltage level. The bit lines are driven to the inhibit voltage level to reduce the likelihood that they may be reprogrammed by a subsequent programming loop. A higher inhibit voltage level can reduce the number of programming failures, but at the expense of increasing power consumption due to an increase in the current generated by driving the bit lines to a higher voltage level.